Cyril Bresch is graduated from the Grenoble Institute of Technology, Esisar school in computer
engineering. He is now a Phd Student within the LCIS lab from Univ. Grenoble Alps and Grenoble
Institute of Technology in Valence, France. His research interests are computer security and
processor architecture security.
Second place a CSAW 2k16 NYU :)
IEEE publication : "A Red Team Blue Team approach Towards a Secure Processor Design With a Hardware Shadow Stack"
You can contact me at cyril[dot]bresch[dot]fr[at]gmail[dot]com